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Stillink3200SGSControlAndSwitchingModule

• Switching circuits
• Serial communication port for setting up the Stillink 3200 at the factory
• PLL circuits for synchronization
• Some other service components

The switching circuits consist of 2048x2048 channel digital switching matrix. Each channel capacity is 64 Kbps (8 bits). Thus, non-blocked TDM and IP call switching are accomplished at the same time. The digital switching matrix is capable of setting up and maintaining paths from any channel out of 16 incoming 8 Mbps (with a frame width of 125 msec) links to any channel among the 16 outgoing 8 Mbps links on the transmit side. Half of these links is reserved for TDM to TDM call routing, whereas the remained half is reserved for VoIP access. Advanced integrated circuits are utilized in the implementation of the switching matrix.

The system synchronization algorithms provide two basic modes of synchronization - with external synchronization source and with internal clock. In case of external synchronization source, input for reference clock signal with 2048 kHz and signal, amplitude and impedance according to ITU-T Rec. G.703, that is E1 interface. The Stillink 3200 may be programmed to synchronize any of the available E1 interfaces.

The parameter Param on the front panel is:

• To restart the Stillink 3200 with factory defaults, and
• To operate some restricted routing criteria laws

In a normal operation, Param is set to secure position, such that the Status led is OFF.

Aux serial connector is used at the factory.

Internal Links